Analysis of GCC compiler vectorizing option sets for H.264 video compression algorithms implemented on the MIPS SIMD architecture

As part of the article, a study was made of the influence of optimizing, including vectorizing, compiler options on the performance of the visualization system for promising systems on a chip with a vector processor. Based on the analysis of the optimizing options of the GCC compiler for the MIPS SIMD architecture, test sets of parameters and compiler options were determined, using which the profiling of 4 test algorithms used in the H.264 video compression standard was carried out.

Authors: D. V. Bogaevskiy, S. N. Ezhov, D. I. Kaplun

Direction: Informatics, Computer Technologies And Control

Keywords: MIPS SIMD architecture, hardware emulator QEMU, GCC compiler optimization, compressing algorithm H.264

---

View full article