HARDWARE IMPLEMENTATION OF ARITHMETIC OPERATIONS IN CAR'S RADAR

Presents possible variants of realization of arithmetic operations in the basis of FPGA hardware resources, aimed at appli-cation in the digital computer of automobile radar in the range 76–77 GHz. The operations are considered: multiplication and division of real numbers, multiplication of complex numbers, extraction of the square root. The comparative analysis of the synthesis results of calculators built in the basis of bi-library elements and IP cores, provided by the manufacturer of FPGA - Intel FPGA company, is carried out, and also alternative implementations in the form of RTL descriptions synthesized on the basis of developed programs in Verilog_HDL language are offered. Synthesis of devices was oriented to Cyclone 10 LP chip application and was performed using Quartus Prime design system. With the use of the considered solutions in the field of arithmetic calculators the variants of implementation of the amplitude detector – the block of primary processing of signals of automobile radar, which implements the integration of data of two quadrature channels, have been offered.

Authors: O. I. Bureneva, A. A. Pustovoitova, D. M. Sobolev

Direction: Informatics, Computer Technologies And Control

Keywords: Primary data processing, hardware implementation, programmable logic device, arithmetic operations, built-in multiplier, complex multiplier, square root calculation

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