HARDWARE-SOFTWARE COMPLEX FOR PROCESSING THE RESULTS OF ELECTROCARDIOGRAPHIC STUDIES
We presented an efficient architecture for the hardware implementation of an intelligent adaptive filter to eliminate noise from cardiac signals by designing the artificial neural network (ANN) on Spartan 6 FPGA chip (XC6SLX9), this network is able to remove all types of noise, in addition of suggesting a noise adaptive correction factor in order to obtain noise free signal, this paper compared between adaptive algorithms that used for filtering ECG signal, such as LMS, NLMS, DLMS, RLS algorithms, based on fixed-point arithmetic, using Xilinx FPGA chips, this research presented NN hardware architecture; which consist of two main parts; the first part includes network training using MATLAB program, the second part represents the fixed point hardware implementation of the trained network using FPGA chip, this research presented an applied study to improve the quality of medical systems that require high accuracy in the diagnosis of heart diseases, where the FPGA chips were chosen because FPGAs include the resources needed to design efficient filtering structures, good results were obtained compared to previous researches where we obtained very high PSNR values up to 65.27, thus improving the performance of medical systems with a very small MSE error up to 1.19 · 10^(–6), we find that the proposed design offers less Area consumption (number of slices 4%) and less delay than other structures, this research can be used in systems that need continual adaptive tracking, achieve signal processing with high speed.
Authors: M. Agha Ragheb, A. Hardan
Direction: Informatics, Computer Technologies And Control
Keywords: Intelligent adaptive filter, ANN, Fixed Point, FPGA, VHDL, ECG, PSNR, PRD
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